Completed all basic non-bus gates

nand2tetris/projects/01/DMux.hdl

@@ -14,5 +14,8 @@ CHIP DMux {
     OUT a, b;
 
     PARTS:
-    // Put your code here:
+    //invert sel
+    Not(in=sel, out=notsel);
+    And(a=sel, b=in, out=b);
+    And(a=notsel, b=in, out=a);
 }

nand2tetris/projects/01/DMux.out

@@ -0,0 +1,5 @@
+|  in   |  sel  |   a   |   b   |
+|   0   |   0   |   0   |   0   |
+|   0   |   1   |   0   |   0   |
+|   1   |   0   |   1   |   0   |
+|   1   |   1   |   0   |   1   |

nand2tetris/projects/01/Mux.hdl

@@ -14,5 +14,10 @@ CHIP Mux {
     OUT out;
 
     PARTS:
-    // Put your code here:
+    //Invert Sel
+    Not(in=sel, out=notsel);
+    //Mux Logic
+    And(a=a, b=notsel, out=and1);
+    And(a=b, b=sel, out=and2);
+    Or(a=and1, b=and2, out=out);
 }

nand2tetris/projects/01/Mux.out

@@ -0,0 +1,9 @@
+|   a   |   b   |  sel  |  out  |
+|   0   |   0   |   0   |   0   |
+|   0   |   0   |   1   |   0   |
+|   0   |   1   |   0   |   0   |
+|   0   |   1   |   1   |   1   |
+|   1   |   0   |   0   |   1   |
+|   1   |   0   |   1   |   0   |
+|   1   |   1   |   0   |   1   |
+|   1   |   1   |   1   |   1   |

nand2tetris/projects/01/Or.hdl

@@ -14,5 +14,7 @@ CHIP Or {
     OUT out;
 
     PARTS:
-    // Put your code here:
+    Nand(a=a, b=true, out=nand1);
+    Nand(a=b, b=true, out=nand2);
+    Nand(a=nand1, b=nand2, out=out);
 }

nand2tetris/projects/01/Or.out

@@ -0,0 +1,5 @@
+|   a   |   b   |  out  |
+|   0   |   0   |   0   |
+|   0   |   1   |   1   |
+|   1   |   0   |   1   |
+|   1   |   1   |   1   |

nand2tetris/projects/01/Xor.hdl

@@ -13,5 +13,11 @@ CHIP Xor {
     OUT out;
 
     PARTS:
-    // Put your code here:
+    //Invert inputs
+    Not(in=a, out=nota);
+    Not(in=b, out=notb);
+    //Xor Logic
+    And(a=a, b=notb, out=and1);
+    And(a=nota, b=b, out=and2);
+    Or(a=and1, b=and2, out=out);
 }

nand2tetris/projects/01/Xor.out

@@ -0,0 +1,5 @@
+|   a   |   b   |  out  |
+|   0   |   0   |   0   |
+|   0   |   1   |   1   |
+|   1   |   0   |   1   |
+|   1   |   1   |   0   |